Machine learning with deep neural networks (DNNs) has become widely applied in domains including computer vision, natural language processing, financial derivatives pricing, and game AI. The growing size of DNN models, the proliferation of edge devices, and the slowdown of Dennard scaling together challenge computer architects to deliver improvements in DNN performance and energy efficiency. Consequently, neural network processing has shifted from general-purpose to dedicated hardware architectures in both academic and commercial settings.
This course will cover algorithms, hardware accelerators, and compiler optimization that must be jointly considered to enable highly efficient machine learning capabilities. In addition to regular lectures, it will also include a number of student-led presentations to discuss the current practices, design needs, as well as future research opportunities in the aforementioned topics.